اسلام منصور عبد الفتاح
أستاذ مساعد
DC-10 GHz broadband linear power amplifier for 5G applications using 180 nm CMOS technology
AEU-International Journal of Electronics and Communications • 2023
معلومات البحث
المؤلفون
Marwa Mansour, Islam Mansour
الكلمات المفتاحية
Not Available
المجلة العلمية
AEU-International Journal of Electronics and Communications
الناشر
Urban & Fischer
المجلد
160
العدد
Not Available
الصفحات
154518
publication.type
International
رابط البحث
Not Available
المواد المرفقة
Not Available
الملخص
Urban & Fischer
Description
This article suggests a broadband linear power amplifier (PA) for DC-10 GHz for Fifth-generation (5G) and multi-standard applications using 180 nm CMOS technology. The suggested radio frequency power amplifier is appropriate for wideband LTE, IoT, WSN, multi-standard, and 5G radio frequency transmitters. T-coil peaking and bridged-shunt-series peaking amplifiers are used for bandwidth extension and gain flatness. Also, the interstage matching inductors between common source and common gate transistors are applied to improve radio frequency achievement. The suggested PA consists of four stages as follows; input stage, two stages using the T-coil peaking technique, and the last stage utilizing bridged-shunt-series peaking topology. The input stage is a complementary current reuse (CCR) common gate with active shunt feedback (SFB) architecture.
Description
This article suggests a broadband linear power amplifier (PA) for DC-10 GHz for Fifth-generation (5G) and multi-standard applications using 180 nm CMOS technology. The suggested radio frequency power amplifier is appropriate for wideband LTE, IoT, WSN, multi-standard, and 5G radio frequency transmitters. T-coil peaking and bridged-shunt-series peaking amplifiers are used for bandwidth extension and gain flatness. Also, the interstage matching inductors between common source and common gate transistors are applied to improve radio frequency achievement. The suggested PA consists of four stages as follows; input stage, two stages using the T-coil peaking technique, and the last stage utilizing bridged-shunt-series peaking topology. The input stage is a complementary current reuse (CCR) common gate with active shunt feedback (SFB) architecture.
